1. Field of the Invention
The present invention relates to a polishing method and apparatus for detecting a polishing end point of a film formed on a semiconductor wafer, such as a poly-Si film, an interlayer insulation film, or a metal film.
2. Description of the Related Art
Conventionally, etchback RIE (reactive ion etching) is known as a method for flattening the surface of a structure in which an arbitrary material is buried in grooves such as contact holes [see FIGS. 1(a)-1(e)]. This method will be described below with reference to FIGS. 1(a)-1 (e).
First, a SiO.sub.2 film 102 is formed on a Si substrate 101, and a poly-Si film 103, to become a stopper film, is formed thereon by chemical-vapor deposition (CVD) [FIG. 1(a)]. Then, the poly-Si film 103 and the Si substrate 101 are selectively removed by RIE, to thereby form grooves [FIG. 1(b)]. A SiO.sub.2 film 105 is deposited by CVD in the grooves 104 and on the surface of the poly-Si film 103 [FIG. 1(c)].
In this case, the surface of the SiO.sub.2 film 105 is formed with depressions at locations corresponding to the grooves 104. To reduce the roughness, an etchback resist 106 is formed on the SiO.sub.2 film 105 [FIG. 1(d)]. Then, RIE is performed under the condition that the etchback resist 106 and the SiO.sub.2 film 105 are etched at approximately the same rate [FIG. 1(e)]. This etchback RIE step produces a structure in which the SiO.sub.2 film 105 is buffed only in the grooves 104 and the surface of the poly-Si film 103, i.e., the wafer surface is flattened. The flattening of the wafer surface is realized by setting the etching rate of the poly-Si film 103 (stopper film) lower than that of the SiO.sub.2 film 105.
When the surface of the poly-Si film 103 starts to be exposed after the SiO.sub.2 film 105 is etched out, a peak corresponding to Si of the poly-Si film 103 appears in the spectrum of plasma discharge light. By detecting the peak corresponding to the poly-Si film 103 by monitoring a variation of the discharge spectrum, the end point of etching the SiO.sub.2 film 105 by etchback RIE can be detected. Thus, the burying of the SiO.sub.2 film 105 in the grooves 104 is completed.
In the above RIE, the stopper film plays an important role in detecting the etching end point of the film being etched. The stopper film should be of a kind that is most suitable for the process and apparatus used and the conditions.
However, the etchback RIE method has the following disadvantages. It consists of many steps including coating of an etchback resist. RIE damage is likely to occur in a wafer surface. It is difficult to provide a wafer surface superior in flatness. A vacuum-type apparatus is used that is complex in structure. Further, a dangerous etching gas is used.
In view of the above problems of the etchback RIE method, recently the CMP (chemical mechanical polishing) method has been investigated widely.
FIG. 2 shows a general structure of a polishing apparatus for CMP, which will be described below.
A polishing plate support 205 is mounted on a stage 201 via a bearing 203. A polishing plate 207 is placed on the polishing plate support 205. A polishing cloth 209 is attached to the polishing plate 207. To rotate the polishing plate support 205 and the polishing plate 207, a drive shaft 211 is connected to central portions of those members. The drive shaft 211 is rotated by a motor 213 via a rotary belt 215.
A wafer 217 is suctioned, by vacuum or stretching, by a suction plate 223 on which a template 219 and a suction cloth 221 are provided so as to be opposite to the polishing cloth 209. The suction plate 223 is connected to a drive shaft 225, which is rotated by a motor 227 via gears 229 and 231. The drive shaft 225 is fixed to a driving stage 233 with respect to vertical movement. With this structure, the driving stage 233 is moved vertically with vertical movement of a cylinder 235 and, as a result, the wafer that is fixed to the suction plate 223 is pressed against the polishing cloth 209 or removed therefrom.
The apparatus has a separate driving system (not shown) to move the wafer in the X/Y directions during a polishing operation. A polishing agent suitable for an intended polishing operation is introduced into the space between the wafer 217 and the polishing cloth 209, to thereby effect the polishing operation.
Referring to FIGS. 3(a)-3(d), an example of the CMP method using the polishing apparatus of FIG. 2 will be described below. First, a Si.sub.3 N.sub.4 film 302 is formed on a Si substrate 301 [FIG. 3(a)]. Then, prescribed portions of the Si.sub.3 N.sub.4 film 302 and the Si substrate 301 are etched (patterning) [FIG. 3(b)]. A SiO.sub.2 film 304 is deposited in grooves 303 and on the surface of the Si.sub.3 N.sub.4 film 302 [FIG. 3(c)]. Then, the SiO.sub.2 film 304 is polished by CMP. When the exposure of the Si.sub.3 N.sub.4 film 302 (stopper film) is detected, the polishing of the SiO.sub.2 film 304 is finished. Thus, the burying of the SiO.sub.2 film 304 in the grooves 303 is completed [FIG. 3(d)].
Compared to the etchback method of FIGS. 1(a)-1(e), the CMP method has the advantages of a reduced number of steps and superior flatness.
The CMP method itself is not a new technique, but has been used in a process of making semiconductor wafers from an ingot. In recent years, the CMP technique came to be used in manufacturing processes of highly integrated devices.
Referring to FIGS. 4(a) and 4(b) and FIGS. 5(a)-5(e), examples of application of the CMP method to highly integrated devices will be described below.
FIGS. 4(a) and 4(b) show an example of application of the CMP method to a trench device separating process.
First, after a SiO.sub.2 film 403 is formed by thermally oxidizing the surface portion of the Si substrate 401, a Si.sub.3 N.sub.4 film 405 that is to serve as a polishing stopper film is formed by CVD. Then, the Si.sub.3 N.sub.4 film 405, SiO.sub.2 film 403 and Si substrate 401 are removed partially, i.e., in device separating regions (patterning by lithography), to thereby form grooves 407. Then, the surface portions of the Si substrate 401 within the grooves 407 are oxidized, and boron ions are implanted into the bottom portions of the grooves 407 to form channel-cut regions 409. A poly-Si (or SiO.sub.2) film 411 is deposited in the grooves 407 by CVD [FIG. 4(a)].
Thereafter, the poly-Si film 411 on the wafer surface is polished to expose the Si.sub.3 N.sub.4 film 405 [FIG. 4(b)]. Since the polishing conditions are so set that the polishing rate of the Si.sub.3 N.sub.4 film 405 is as low as about 1/200 to 1/10 of that of the poly-Si film 411, the polishing can be stopped by the Si.sub.3 N.sub.4 film 405. Thus, the poly-Si film 411 can be buried only in the grooves 407.
In this manner, by employing, as the stopper film, a film that has a polishing rate lower than that of a film to be polished and specifying a polishing time, the polishing can be finished when the stopper film is exposed.
FIGS. 5(a)-5(e) show an example of application of the CMP method to burying metal wiring lines in grooves of an insulating film.
First, a CVD-SiO.sub.2 film 503 and a plasma-SiO.sub.2 505 are successively formed on a Si substrate 501 [FIG. 5(a)]. Grooves 507 are formed by patterning in the plasma-SiO.sub.2 film 505 at prescribed positions [FIG. 5(b)]. A Cu film 509 is deposited in the grooves 507 and on the entire surface of the plasma-SiO.sub.2 film 505 [FIG. 5(c)]. Then, the Cu film 509 is polished using the plasma-SiO.sub.2 film 505 as a stopper film. The polishing of the Cu film 509 is finished when the plasma-SiO.sub.2 film 505 is exposed. Thus, the Cu film 509 is buried only in the grooves 507, to form Cu wiring lines [FIG. 5(d)].
The wafer surface is flattened by the polishing, to thereby facilitate subsequent formation of a second plasma-SiO.sub.2 film 511 [FIG. 5(e)]. Further, the flattening by CMP facilitates formation of wiring lines of the second and third layers (not shown).
However, an effective method for detecting a polishing end point has not been established in the above types of CMP methods for highly integrated devices. Conventionally, the end point detection is performed by properly setting the polishing time. Since various kinds of films are laid on a wafer surface (or a Si substrate surface) as shown in FIGS. 3(a)-5(e), the polishing should be finished with high accuracy when a stopper layer under a film being polished is exposed.
However, the thickness of films to be polished varies over a wide range of several tens of nanometers to several microns, and the thickness also varies even among wafers of the same type. Therefore, the detection of the polishing end point simply by setting the polishing time has the problem that overpolishing may occur. In such case, a stopper film may be entirely removed and even a film under the stopper film is polished. Conversely, an insufficient polishing time may permit a polishing film, that is laid on a stopper film, to remain.
Thus, it is very important to develop a technique for detecting a polishing end point.
In one of the conventional polishing end point detecting methods, the end point is detected based on a variation of wafer capacitance which variation is caused by the decreasing thickness of the film being polished.
However, this method has the following problems. First, variation of the capacitance is small during the polishing process. Second, the wafer capacitance varies depending on the product and the manufacturing process, because films formed on a wafer may have a multilayered structure and the chip pattern varies with the type of product. Therefore, the end point detecting conditions need to be carefully adjusted for each case.
Among other problems, the wafer capacitance cannot be detected on a real-time basis during a polishing operation. Accordingly, the capacitance-based end point detecting method is not widely employed.
As the device structure is miniaturized, the quantity of the removed material by polishing is reduced, which means a smaller difference between the wafer capacitance at the start of polishing and that at its end. Therefore, it is difficult to detect positively such a small variation with high accuracy.